Design of Reversible/Quantum Ternary Multiplexer and Demultiplexer

Optimized Design of Multiplexor by Quantum-dot CellularAutomata

Quantum-dot Cellular Automata (QCA) has low power consumption and high density and regularity. QCA widely supports the new devices designed for nanotechnology. Application of QCA technology as an alternative method for CMOS technology on nano-scale shows a promising future. This paper presents successful designing, layout and analysis of Multiplexer with a new structure in QCA technique. In thi...

High-Speed Rapid-Single-Flux-Quantum Multiplexer and Demultiplexer Design and Testing

All Optical Reversible NOR Gates using TOAD

In recent past, reversible logic is emerged as a promising computing paradigm with applications in low-power CMOS, quantum computing, optical computing and nanotechnology. Optical logic gates become potential component to work at macroscopic (light pulses carry information), or quantum (single photon carries information) levels with high efficiency. In this paper, we propose a novel scheme of T...

Theory and design of spectrum-efficient bandwidth-on-demand multiplexer-demultiplexer pairs based on wavelet packet tree and polyphase filter banks

A set of desirable characteristics of a multicarrier spectrumefficient bandwidth-on-demand multiplexer-demultiplexer pair for use in mobile satellite and personal communication systems is identified and described. New characteristics are the use of single VSB channels, design of multiplexer channels based on wavelet packet trees which have specified stopband attenuation, overlap of the multiple...

Design and operation of a rapid single flux quantum demultiplexer

A demultiplexer (DMUX) is a key subsystem of rapid single flux quantum (RSFQ) circuits and systems in practical applications. High-speed data from RSFQ circuits should be converted into sufficiently low-speed ones for transmission to and processing by room temperature electronics. We designed, fabricated and successfully tested an RSFQ DMUX based on the synchronous shift-and-dump architecture w...